1. Field of the Invention
The present invention generally relates to a pixel driving method and a timing controller using the same, and more particularly, to a pixel dithering driving method and a timing controller user the same.
2. Description of Related Art
At present, the integrated circuit and software used of the signal source of a computer or video equipment is capable of generating an increasing number of gray levels, for example, 256 gray levels for an 8-bit resolution or 1024 gray levels for a 10-bit resolution. However, the number of gray levels in the existing visual output apparatus such as display, projector, and printer is often limited by hardware cost consideration to only 64 gray levels, for example. To display the richer original gray levels, simulation techniques including frame rate control (FRC) and dithering are used to enhance the variations of gray levels and increase the number of gray levels.
Frame rate control utilizes the temporary visual retention characteristic of the human eye to cut out more gray levels between two neighboring gray levels by timing control. First, the number of frames displayed per second or the frame rate needs to be increased. According to the desired gray level brightness of the cut out, two close gray levels are displayed base on their ratio. Because of the temporary visual retention characteristic of the human eye, the human eye will react by averaging out the displayed frames seen within this period. Therefore, gray levels not originally displayed by the visual output apparatus can be seen.
FIG. 1 is a simple diagram illustrating the principles behind the frame rate control. First, look at the area on the left side of the arrow in FIG. 1. The dark portion displays identical dark gray levels and the white portion displays identical light gray levels. Next, look at the area from left to right. It can be seen that there is a change of gray level in a frame for every movement of a row to the right (for example, as indicated by 101). When the movement to the right is sufficiently fast, the observed images rapidly accumulate due to the temporary visual retention characteristic of the human eye. As a result, the display as perceived by the human eye is shown in the area on the right side of the arrow. The gray levels in the area increase from top to bottom. Moreover, with more frames changing their gray levels, the number of gray levels also increases. Therefore, using these principles, the display of gray levels in a visual output apparatus is enhanced. For example, for a visual output apparatus that can originally display 64 gray levels, a 6 bits input signal can used to simulate an 8 bits input signal for the gray level.
The operating principles of pixel dithering is very similar to that of the frame rate control because both utilizes the visual averaging of the human eye, the change in several frames are amalgamated together to form differences in gray levels. However, the main difference between the two is that pixel dithering utilizes spatial control to divide more gray levels while the frame rate control utilizes the time control. FIG. 2 is a diagram illustrating the principles of pixel dithering. First, look at the upper portion of FIG. 2. The dark portions in this area display identical dark gray levels and the white portions in this area display identical light gray levels. The lower portion of FIG. 2 displays the average gray levels corresponding to the upper portion, that is, the gray levels in the lower portion are obtained after averaging the gray levels in the upper portion. Through the correspondence between the upper portion and the lower portion of FIG. 2, it should be noted that when more pixels 201 have identical dark gray levels, the corresponding average color is darker. Using this principle, the display of gray level in a visual output apparatus is also enhanced.
At present, the techniques of pixel dithering and frame rate control are combined to produce the so-called ‘pixel dithering/frame rate control technique’ or simply ‘Dithering/FRC’. Using an input gray level signal having 8 bits as an example, the Dithering/FRC technique uses two of the low order bits of the input gray level signals, that is, bit 0 and bit 1, to perform bit processing. The other six high order bits, that is, bit 2˜bit 7, are used as basic data. By combining the six high order bits of basic data with the processed result of the two low order bits, a new gray level data is produced as shown in FIG. 3.
FIG. 3 is a diagram illustrating the process of converting 8-bit gray levels to 6-bit gray levels. Because 6 bits can display 0˜63 gray levels and 8 bits can display 0˜255 gray levels, three gray level variations must be added to every neighboring two gray level variations that can be displayed by 6 bits in order to display 256 gray levels with just 6 bits. FIG. 4 is a look up table between 6-bit gray levels and 8-bit gray levels. For example, three gray level variations are inserted between the 0th and the 1st gray level variation of the 6 bits. In other words, the low order bits 01, 10 and 11 are respectively used to defined gray level variations and then time difference is used to produce the effect of having 256 levels.
In the following, FIGS. 5A˜5D are used to list out the gray level variations as defined by the four low order bits 00, 01, 10 and 11. In FIGS. 5A˜5D, each small rectangle in a frame is a pixel and four pixels form a group. According to the description, refer to FIG. 4 and FIGS. 5A˜5D when necessary. As shown in FIG. 4, when the last two low order bits of the 8 bits data received by the timing controller (not shown) is 00, the gray levels corresponding to the 8 bits are the 0, 4, 8, . . . levels. Meanwhile, the gray levels corresponding to the 6 bits are the 0, 1, 2, . . . levels, in other words, the Nth (represented by N, N+1, N+2 . . . ) level of the 6-bit gray level. At this time, the output gray levels remain unchanged. Therefore, every one of the small rectangles in FIG. 5A is represented by the Nth level and has a luminance identical to the luminance displayed by the Nth level of the original 6 bit gray level. In other words, the displayed brightness of every frame has a luminance of the Nth level.
When the last two low order bits of the 8 bits data received by the timing controller is 01, the gray levels corresponding to the 8 bits are the 1, 5, 9, . . . levels. At this time, the output gray levels need to be slightly changed so as to increase the number of gray levels. The change in output gray levels is shown in FIG. 5B. Frame 1˜frame 4 all have one small rectangle represented by the N+1th level and the relative location of the small rectangle displaying the N+1th level are different in different frames so that the spatial display of luminance is an average. Accordingly, each frame in FIG. 5B displays an average luminance of N+(¼)N level.
When the last two low order bits of the 8 bits data received by the timing controller is 10, the gray levels corresponding to the 8 bits are the 2, 6, 10, . . . levels. At this time, the output gray levels also need to be slightly changed so as to increase the number of gray levels. The change in output gray levels is shown in FIG. 5C. Frame 1˜frame 4 all have two small rectangle represented by the N+1th level. Furthermore, the two small rectangles displaying the N+1th level are positioned in the upper half, the right half, the lower half and the left half of frame 1˜frame 4, respectively. Accordingly, each frame in FIG. 5C displays an average luminance of N+(½)N level.
When the last two low order bits of the 8 bits data received by the timing controller is 11, the gray levels corresponding to the 8 bits are the 3, 7, 11, . . . levels. At this time, the output gray levels also need to be slightly changed so as to increase the number of gray levels. The change in output gray levels is shown in FIG. 5D. Frame 1˜frame 4 all have only one small rectangle represented by the Nth level and the relative location of the small rectangle displaying the Nth level are different in different frames so that the spatial display of luminance is an average. Accordingly, each frame in FIG. 5D displays an average luminance of N+(¾)N level.
On the surface, the Dithering/FRC technique is able to combine spatial and temporal visual effects to display 256 levels through 6 bits. However, in practice, the existing Dithering/FRC technique is incapable of fully displaying all the 256 levels of variations, because it is impossible to insert any more gray level variations after the 63rd gray level that is the highest gray level displayed by 6 bits. More specifically, the 252nd gray level of 8 bits is capable of being represented by the 63rd gray level of 6 bit after the Dithering/FRC algorithm. However, the 253rd˜255th gray levels of the 8 bits are still being represented by the 63rd gray level of 6 bit after the Dithering/FRC algorithm. At this time, if gray levels are added, overflow may occur. Therefore, the 252nd˜255th gray levels have identical gray levels so that 6 bits data can generate at most 253 gray level variations.